发明名称
摘要 <p>PROBLEM TO BE SOLVED: To realize an IDCT circuit capable of simultaneously reproducing a plurality of HD images with a small-scale circuit configuration. SOLUTION: This IDCT circuit consists of a 1st partial IDCT circuit 10 in which even number data by two pieces each are simultaneously inputted among eight pieces of DCT coefficient data inputted to input terminals Ain, Bin, Cin and Din and IDCT processing is performed, a 2nd partial IDCT circuit 20 in which odd number data by two pieces each are simultaneously inputted among eight pieces of DCT data and IDCT processing is performed, and an output arithmetic circuit 30 for obtaining eight pieces of IDCT data by adding and subtracting pieces of output data from the two IDCT circuits 10 and 20, and realizes high speed IDCT processing with the small scale circuit configuration composed of a small number of fixed coefficient multipliers by dividing eight pieces of IDCT processing into four paths according to high speed operation algorithm and performing parallel processing.</p>
申请公布号 JP3749826(B2) 申请公布日期 2006.03.01
申请号 JP20000280824 申请日期 2000.09.14
申请人 发明人
分类号 G06F17/14;H03M7/30;H04N19/42;H04N19/436;H04N19/44;H04N19/60;H04N19/625 主分类号 G06F17/14
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