发明名称 Built-in self-test circuitry for integrated circuits
摘要 Circuits, methods, and apparatus for output response analyzers that may be used during integrated circuit testing. Current output test data is compared with previous output test data. In this way, repetitive test patterns such as checkerboards may be employed while limiting circuit complexity. The outputs of several built-in self-test circuits may be combined into as few as one signal that may be provided as a test output.
申请公布号 US7005875(B1) 申请公布日期 2006.02.28
申请号 US20040775716 申请日期 2004.02.09
申请人 ALTERA CORPORATION 发明人 NATARAJAN BALAJI;TRACY PAUL
分类号 G01R31/26 主分类号 G01R31/26
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