发明名称 VDT STRESS MITIGATING DEVICE AND METHOD, VDT STRESS RISK QUANTIFYING DEVICE AND METHOD, AND RECORDING MEDIUM
摘要 The aim of the present invention is to provide a VDT stress mitigating devic e and method capable of mitigating VDT stress caused by a regular spatial pattern and VDT stress caused by flicker generated by an interlaced format, a VDT stress ris k quantifying device and method, and a recording medium. An A/D conversion section 10 imports interlaced format video signals P1 from an external image signal output devi ce and converts them in field units by A/D conversion into image data D1. A filter section 2 0, while not distinguishing between the first field and the second field, and while maintaining the temporal order of these fields, performs a temporal filtering process on the image data of each field. A D/A conversion section 30 converts the image data D2 that has undergone the temporal filtering process by the filter section 20 into image signals P2 based on an interlaced format by D/A conversion. The image signals P2 are then sequentially outputs according to the temporal order of the fields.
申请公布号 CA2326712(A1) 申请公布日期 2001.05.24
申请号 CA20002326712 申请日期 2000.11.23
申请人 NEC CORPORATION 发明人 NOMURA, MASAHIDE
分类号 H04N5/66;G09G5/00;G09G5/24;G09G5/36;G09G5/42;H04N5/44;H04N5/65;(IPC1-7):G06F3/14 主分类号 H04N5/66
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