发明名称 |
Word line arrangement having segmented word lines |
摘要 |
A three-dimensional (3D) passive element memory cell array provides short word lines while still maintaining a small support circuit area for efficiency. Short, low resistance word line segments on two or more word line layers are connected together in parallel to form a given word line without use of segment switch devices between the word line segments. A shared vertical connection preferably connects the word line segments together and connects to a word line driver circuit disposed generally below the array near the word line. Each word line driver circuit preferably couples its word line either to an associated one of a plurality of selected bias lines or to an unselected bias line associated with the driver circuit, which selected bias lines are themselves decoded to provide for an efficient multi-headed word line decoder.
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申请公布号 |
US7002825(B2) |
申请公布日期 |
2006.02.21 |
申请号 |
US20050103184 |
申请日期 |
2005.04.11 |
申请人 |
MATRIX SEMICONDUCTOR, INC. |
发明人 |
SCHEUERLEIN ROY E. |
分类号 |
G11C5/02;G11C5/06;G11C8/08 |
主分类号 |
G11C5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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