| 摘要 |
A device for extracting parasitic capacitance including the influence of a dummy metal pattern inserted between the circuit wires of a semiconductor device comprises a permittivity correction unit for correcting the permittivity of a dielectric existing between the circuit wires in accordance with the insertion of the dummy metal and a parasitic capacitance extraction unit for extracting parasitic capacitance between the circuit wires, based on the corrected permittivity and the layout of a circuit.
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