| 摘要 |
The power consumption when the memory is accessed is often a concern for low power microcontroller systems. Specifically it is desirable to minimize the power consumption during the often very long periods of processor idling time. The invention presented implements a power saving technique by replacing the program memory, containing the idle-program-routine with a simple hard wired address-decoder and coded-data-driver to produce the very few program instructions to run the processor in a permanent loop. The minimum implementation just produces the few bytes for a single instruction to jump back to its own address. As there are very few circuits involved, its memory power consumptions is nearly zero.
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