| 摘要 |
A display controller which outputs a grayscale clock signal for specifying a change point of a pulse width modulated signal. The display controller includes: a grayscale clock generation section which generates a grayscale clock signal having first to Nth (N is an integer greater than one) grayscale pulses within a predetermined period starting from a reference timing; and first to Nth grayscale pulse setting registers for setting edges of the first to Nth grayscale pulses. The grayscale clock generation section sets an interval between the reference timing and an edge of the first grayscale pulse and an interval between edges of the (i-1)th grayscale pulse (2<=i<=N, i is an integer) and the ith grayscale pulse, based on values set in the first to Nth grayscale pulse setting registers, and outputs the grayscale clock signal having the first to Nth grayscale pulses. |
