Verfahren und Einrichtung zum Testen Digitalsignale verarbeitender integrierter Schaltungen,申请号DE19961033922-传众专利搜索

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发明名称	Verfahren und Einrichtung zum Testen Digitalsignale verarbeitender integrierter Schaltungen
摘要
申请公布号	DE19633922(B4)	申请公布日期	2006.02.09
申请号	DE19961033922	申请日期	1996.08.22
申请人	SIEMENS AG	发明人	JOST, MARTIN
分类号	G01R31/28;G01R31/317;G01R31/319;G01R31/3193	主分类号	G01R31/28
代理机构		代理人
主权项
地址

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