SEMICONDUCTOR DEVICE PERFORMING REFRESH OPERATION AND METHOD FOR DRIVING THE SAME

摘要

A semiconductor device includes a first memory block, a second memory block, a first refresh control block for generating a first block control signal and a second block control signal in response to a refresh pulse signal, a second refresh control block for generating a first refresh control pulse signal and a second refresh control pulse signal corresponding to a first refresh operation section of the first memory block and a second refresh operation section of the second memory block, respectively, in response to the refresh pulse signal and the first and second block control signals, and a third refresh control block for controlling the first and second memory blocks so that a first refresh operation of the first memory block and a second refresh operation of the second memory block are discontinuously performed in response to the first and second refresh control pulse signals.

主权项

1. A semiconductor device, comprising:
a first memory block including a plurality of first memory units; a second memory block including a plurality of second memory units; a first refresh control block that generates a first block control signal corresponding to the first memory block and a second block control signal corresponding to the second memory block in response to a refresh pulse signal; a second refresh control block that generates a first refresh control pulse signal corresponding to a first refresh operation section of the first memory block and a second refresh control pulse signal corresponding to a second refresh operation section of the second memory block in response to the refresh pulse signal and the first and second block control signals; and a third refresh control block that controls the first and second memory blocks so that a first refresh operation of the first memory block and a second refresh operation of the second memory block are discontinuously performed in response to the first and second refresh control pulse signals, wherein the second refresh operation of the second memory block starts after the first refresh operation of the first memory block is completed.