发明名称 Integrated circuit analysis method and program product
摘要 A method for analyzing integrated circuits (IC's) has steps of dividing the circuit into a plurality of individual blocks that are linked together. Each block is comprised of a plurality of latches and paths connecting the latches. The blocks are compressed by removing all detail not required for performing global transparency timing modeling.
申请公布号 US6996792(B2) 申请公布日期 2006.02.07
申请号 US20020059486 申请日期 2002.01.29
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 PIE CHARLES COREY;RANSON GREGORY LOUIS
分类号 G06F17/15;G06F17/50 主分类号 G06F17/15
代理机构 代理人
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