发明名称 |
Single transistor DRAM cell with reduced current leakage and method of manufacture |
摘要 |
A single transistor planar DRAM memory cell with improved charge retention and reduced current leakage and a method for forming the same, the method including providing a semiconductor substrate; forming a gate dielectric on the semiconductor substrate; forming a pass transistor structure adjacent a storage capacitor structure on the gate dielectric; forming sidewall spacer dielectric portions adjacent either side of the pass transistor to include covering a space between the pass transistor and the storage capacitor; forming a photoresist mask portion covering the pass transistor and exposing the storage capacitor; and, carrying out a P type ion implantation and drive in process to form a P doped channel region in the semiconductor substrate underlying the storage capacitor.
|
申请公布号 |
US2006022240(A1) |
申请公布日期 |
2006.02.02 |
申请号 |
US20040903084 |
申请日期 |
2004.07.31 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HUANG CHIH-MU;KING MINGCHU;CHANG YUN |
分类号 |
H01L21/8244;H01L29/94 |
主分类号 |
H01L21/8244 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|