发明名称 Method and system for creating timing constraint library
摘要 A cell has input pins and output pins, and the input pins are connected to output pins through timing arcs. A method of creating a timing constraint library of the cell includes: selecting one of the timing arcs as a representative timing arc; calculating the timing constraint with respect to the representative timing arc by simulating the cell under all of a fundamental condition group; extracting partial conditions from the fundamental condition group; and calculating the timing constraint with respect to another of the timing arcs which shares any of the input pin and the output pin with the representative timing arc by simulating the cell under the extracted partial conditions.
申请公布号 US2006020441(A1) 申请公布日期 2006.01.26
申请号 US20050185748 申请日期 2005.07.21
申请人 NEC ELECTRONICS CORPORATION 发明人 TOYODA TORU;SHIMIZU TAMAMI
分类号 G06F17/50 主分类号 G06F17/50
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