发明名称 MULTIPLICATION RESIDUES CALCULATING DEVICE AND INFORMATION PROCESSING DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a multiplication residues calculating device and an information processing device capable of shortening the operation time without increasing the circuit scale. <P>SOLUTION: This is a multiplication residues calculating device for the expression of S=S+A&times;B+u&times;N. It has a logic circuit to convert the values of the pluralities of multipliers B, N supplied in the unit of the number q of bits by the Booth method, and to select to output the integral multiple value of the multiplicand A corresponding to the converted B, and also to select to output the integral multiple value of the multiplicand u corresponding to the converted N; a carrying storage adder to calculate A&times;B+u&times;N by using the values the logic circuit outputs sequentially; and an adder to add the calculated results of A&times;B+u&times;N output by the count q of bits from the carrying storage adder and the past calculated results output in the unit of the number q of bits in order to output the added results as the result S of the multiplication residues calculation. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006023648(A) 申请公布日期 2006.01.26
申请号 JP20040203436 申请日期 2004.07.09
申请人 NEC MICRO SYSTEMS LTD;UNIV WASEDA 发明人 AZUMA KUNIHIKO;KUMON TORU;GOTO SATOSHI;IKENAGA TAKESHI
分类号 G09C1/00;G06F7/533 主分类号 G09C1/00
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