发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor device equipped with a surface laminated electrode structure which relaxes an intrinsic stress generated after assembly and an extrinsic stress generated under conditions of use, and which is suitable for products having a shallow junction formed at a region particularly near a chip surface. <P>SOLUTION: Lower faces of a plurality of leads 2 are exposed from the lower face of a resin sealing material 4, and the laminated electrode structure 7 including a metal layer 8 for solder bonding is formed on a silicon semiconductor substrate 10 to connect a frame through a solder. The laminated electrode structure 7 includes a first metal layer 11 forming the semiconductor substrate and a Schottky junction; a second metal layer 12 which is formed on the first metal layer and of which main component is Al relaxing the stress on the junction; a third metal layer 13 which is formed on the second metal layer and of which main component is Mo or Ti which does not easily cause an intermetallic compound with Al; and the metal layer 8 for solder bonding which is formed on the third metal layer and includes at least an Ni layer. The second metal layer fully demonstrates a stress relaxing action by Al. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006024829(A) 申请公布日期 2006.01.26
申请号 JP20040202989 申请日期 2004.07.09
申请人 TOSHIBA CORP 发明人 WATANABE MITSURU;FUKUI TETSUYA
分类号 H01L29/872;H01L29/47;H01L29/866 主分类号 H01L29/872
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