发明名称 ENCODING METHOD, ENCODING DEVICE, DECODING METHOD, DECODING DEVICE, AND PROGRAM THEREOF
摘要 <p>A sub-block generation circuit (52) divides a coefficient of 8 x 8 orthogonal conversion into sub-block data. A 2-dimensional reversible encoding circuit (54) encodes data on the number-of-non-zero coefficients of the sub block far from the DC component Total Coeff by selecting conversion table data for assigning an encoding code of a short bit length to the data on the number-of-non-zero coefficients indicating 0.</p>
申请公布号 WO2006006564(A1) 申请公布日期 2006.01.19
申请号 WO2005JP12772 申请日期 2005.07.11
申请人 SONY CORPORATION;SUZUKI, TERUHIKO;ISHIGAYA, KAZUHIRO;YAGASAKI, YOICHI 发明人 SUZUKI, TERUHIKO;ISHIGAYA, KAZUHIRO;YAGASAKI, YOICHI
分类号 H04N19/60;H03M7/40;H03M7/46;H04N19/136;H04N19/423;H04N19/51;H04N19/513;H04N19/625;H04N19/90;H04N19/93 主分类号 H04N19/60
代理机构 代理人
主权项
地址