发明名称 III-V COMPOUND SEMICONDUCTOR AND ITS MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a III-V compound semiconductor of a thin layer, by which a flat structure of a regrowth surface is rapidly obtained in regrowth for fabricating a burying structure. <P>SOLUTION: The III-V compound semiconductor includes a pattern on a layer consisting of a first III-V compound semiconductor and a layer consisting of a second III-V compound semiconductor on the first III-V compound semiconductor and the pattern, wherein the first semiconductor is expressed by a general formula of In<SB>u</SB>Ga<SB>v</SB>Al<SB>w</SB>N (0&le;u&le;1, 0&le;v&le;1, 0&le;w&le;1, u+v+w=1), the pattern consists of an insulating material or a metal material which is stable even in a growth condition of the second III-V compound semiconductor, and the second semiconductor is expressed by a general formula of In<SB>x</SB>Ga<SB>y</SB>Al<SB>z</SB>N (0&le;x&le;1, 0&le;y&le;1, 0&le;z&le;1, x+y+z=1). In the III-V compound semiconductor, the insulating material or the metal material is one of SiO<SB>2</SB>, SiN<SB>x</SB>and tungsten, the pattern is a line pattern which is almost parallel to a [1-100] direction of the first III-V compound semiconductor, and a width of the line pattern is 1 &mu;m or less. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006013476(A) 申请公布日期 2006.01.12
申请号 JP20050151995 申请日期 2005.05.25
申请人 SUMITOMO CHEMICAL CO LTD 发明人 SAWAKI NOBUHIKO;HIRAMATSU KAZUMASA;HANAI HISAYOSHI;MATSUSHIMA HIDETADA;MAEDA NAOYOSHI;ONO YOSHINOBU
分类号 H01L21/205;H01L21/338;H01L29/778;H01L29/80;H01L29/812;H01L33/06;H01L33/32;H01S5/343 主分类号 H01L21/205
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