SEMICONDUCTOR STORAGE DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor storage device wherein reduced power consumption can be realized and high speed of the writing operation can be realized by suppressing an excess timing margin in writing operation with a saved area and suppressing charge and discharge currents of a bit line pair during writing operation to the minimum.

SOLUTION: The semiconductor storage device is provided with a dummy wordline DWL and a timing adjusting circuit 5 having delay characteristics nearly equal to usual writing delay characteristics. The timing adjusting circuit 5 is constituted of a dummy cell 6 driven by the dummy wordline DWL and a detection circuit 7 detecting output of the dummy cell 6. Writing operation can be completed based on a detecting signal outputted by detection of the usual writing delay and the excess timing margin in the writing operation can be suppressed.

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