发明名称 Duty cycle controlled CML-CMOS converter
摘要 There is provided a CML to CMOS converter comprising two current sources both connected between a first power supply, having a first potential, and a driving node, first and second push-pull drive stages each having a current path connected between a second power supply, having a second potential, and the driving node, and each having a control input for one half of a CML signal and an output node. Each of the two output nodes is connected to the control node of a respective one of the current sources, each current source being connected to decrease the current it supplies to the driving node if the potential of its respective output of the converter moves towards the potential of the first power supply.
申请公布号 US2006001446(A1) 申请公布日期 2006.01.05
申请号 US20050150903 申请日期 2005.06.13
申请人 PICKERING ANDREW;FOREY SIMON;HUNT PETER 发明人 PICKERING ANDREW;FOREY SIMON;HUNT PETER
分类号 H03K19/0175;H03K5/156;H03K19/003;H03K19/0185 主分类号 H03K19/0175
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