发明名称 |
Parallel monitor circuit and semiconductor apparatus |
摘要 |
A parallel monitor circuit ( 1 A) for monitoring one (C 1 ) of serially connected plural capacitors (Cn) receiving a direct recharging current is disclosed. The circuit comprises a bypassing transistor (Q 1 ) for bypassing the capacitor (C 1 ) with the recharging current when the capacitor voltage (VSo 1 ) exceeds a monitor voltage (Vr 1 ) determined by a voltage setting circuit in order to equally recharge the capacitors. A transferring unit transfers a voltage control circuit (VS 1 ) and an internal circuit connected to the voltage control circuit to a standby mode when the voltage control circuit receives a specific combination of voltage codes (RC 1 ).
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申请公布号 |
US2005285565(A1) |
申请公布日期 |
2005.12.29 |
申请号 |
US20050091420 |
申请日期 |
2005.03.29 |
申请人 |
YANO KOICHI;FUJIWARA AKIHIKO |
发明人 |
YANO KOICHI;FUJIWARA AKIHIKO |
分类号 |
H02J7/02;H02J1/00;H02J7/00;H02J7/06;H02J7/34;H02J9/00;H02J13/00;(IPC1-7):H02J7/00 |
主分类号 |
H02J7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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