发明名称 Semiconductor device, microcomputer, and electronic equipment
摘要 A semiconductor device comprising a bus master and a bus slave connected by a second bus is provided. A bus control unit (BCU) comprises a first relative address control circuit that performs a process for requesting the access using a relative address to a semiconductor storage medium through the second bus, the process including generation of a relative address corresponding to an absolute address based on the received absolute address and generation of an identification signal indicating the relative address. The memory controller comprises a second relative address control circuit that decides whether the received access address is a relative address or not and, if the received access address is a relative address, calculates an absolute address corresponding to the relative address.
申请公布号 US2005289320(A1) 申请公布日期 2005.12.29
申请号 US20050157520 申请日期 2005.06.21
申请人 KUBOTA SATOSHI 发明人 KUBOTA SATOSHI
分类号 G06F12/02;G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/02
代理机构 代理人
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