发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To allow the shapes of diffused source and drain layers to be made shallow in the depth direction and small in the lateral direction, and to allow redistribution of the impurity in a diffused extension layer to be suppressed, while suppressing manifestation of short channel effect accompanied with miniaturization. SOLUTION: A MIS-type semiconductor device comprises a P-type semiconductor substrate 11, a gate insulating film 14 formed on the semiconductor substrate 11, a gate electrode 15 formed on the gate insulating film 14, and N-type diffused source and drain layers 20 formed in regions of the semiconductor substrate 11 below both sides of the gate electrode 15. In the N-type diffused source and drain layers 20, there is formed P-type impurity-implanted regions 19 having a P-type impurity concentration lower than that of the N-type diffused source and drain layers 20. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005347731(A) 申请公布日期 2005.12.15
申请号 JP20040366568 申请日期 2004.12.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NODA YASUSHI
分类号 H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/78
代理机构 代理人
主权项
地址