发明名称 Method and system for determining the best integral process path to process semiconductor products to improve yield
摘要 A computer-implemented method for identifying the best process path in a semiconductor manufacturing process for processing a plurality of wafer lots that includes providing a plurality of operations in the semiconductor manufacturing process, providing a plurality of tools in at least one of the plurality of operations, providing a plurality of yields for each of the plurality of operations, providing a plurality of process paths, calculating an average yield for the plurality of yields, setting the average yield as a response, setting the plurality of operations as control factors, setting the plurality of tools as factor levels in response to at least one of the plurality of operations, determining at least one of the plurality of operations as having the most contribution using an analysis of variance method, wherein the at least one of the plurality of operations causes the responses to change greater than a predetermined level when the plurality of tools are changed, and outputting the at least one of the plurality of operations as the most influential operation.
申请公布号 US6975916(B2) 申请公布日期 2005.12.13
申请号 US20010900165 申请日期 2001.07.09
申请人 PROMOS TECHNOLOGIES, INC. 发明人 KUO NEAL
分类号 G06Q10/00;(IPC1-7):G06F19/00 主分类号 G06Q10/00
代理机构 代理人
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