发明名称 |
Method of manufacturing semiconductor device and semiconductor device |
摘要 |
Impurity ions are implanted into the silicon layer of an SOI substrate to achieve an ion concentration distribution which inhibits for a reduction in threshold voltage (Vth-rolloff) as a gate length is reduced. A reduction in potential barrier which runs from a drain region side is effectively inhibited to counter short channel effects resulting from a reduction in gate length attendant with miniaturization of SOI-MOSFETs.
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申请公布号 |
US6974982(B2) |
申请公布日期 |
2005.12.13 |
申请号 |
US20040913430 |
申请日期 |
2004.08.09 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
MIURA NORIYUKI |
分类号 |
H01L27/08;H01L21/265;H01L21/336;H01L21/762;H01L21/8238;H01L27/092;H01L29/786;(IPC1-7):H01L29/76 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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