发明名称 SECURITY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a security circuit that can perform simultaneous trimmings on a plurality of samples. SOLUTION: The security circuit contains a frequency detecting circuit (11) which is used for detecting the frequency abnormality of a clock signal and a system resetting circuit (13) used for forming a system resetting signal based on the detected result of the frequency detecting circuit (11). The security circuit also contains a self-trimming circuit (14) which changes the trimming value of the target set value of the frequency abnormality detection in a state that a clock signal having the frequency which is equal to the target set value of the frequency abnormality detection at the frequency detecting circuit is supplied to the frequency detecting circuit, and, decides the trimming value of the target set value of the frequency abnormality detection based on the detected result of the frequency detecting circuit whenever the trimming value is changed. Since the trimming procedures among a plurality of samples can be made equal to one another in the course of self-trimming, this security circuit can perform simultaneous trimmings on the plurality of un-diced samples. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005340722(A) 申请公布日期 2005.12.08
申请号 JP20040160958 申请日期 2004.05.31
申请人 RENESAS TECHNOLOGY CORP 发明人 MORIYAMA NAOKATSU;YUASA HIDEKI
分类号 G01R31/28;H01L21/822;H01L27/04;(IPC1-7):H01L21/822 主分类号 G01R31/28
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