发明名称 Paralleling digital-input amplifiers
摘要 Two or more digital-input RF amplifiers are configured in parallel such that a combiner combines their respective outputs to generate a relatively large composite RF output signal. A feedback control architecture minimizes the phase differences between the various amplifier outputs so that the outputs can be efficiently combined. The feedback control can measure the return loss for each amplifier to determine how to adjust each amplifier's phase. In some embodiments, the feedback control can also measure the composite RF output signal for use in phase adjustment. In certain implementations, phase adjustment is implemented by an iterative coarse phase-adjustment mode (e.g., based on either the return loss or the composite output signal) followed by an iterative fine phase-adjustment mode (e.g., based on the return loss).
申请公布号 US2005270095(A1) 申请公布日期 2005.12.08
申请号 US20040861045 申请日期 2004.06.04
申请人 ANDREW CORPORATION, A DELAWARE CORPORATION 发明人 BURKE MICHAEL E.;OCENASEK JOSEF;SIEGEL JEFFREY A.
分类号 H03F1/02;H03F1/34;H03F1/36;H03F3/60;H03F3/68;(IPC1-7):H03F3/68 主分类号 H03F1/02
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