发明名称 Chip arrangement
摘要 A substrate plate (2) has an opening (3) to take a carrier chip (4) with electrical/electronic components (5). Integrated in the carrier chip are conductor strips (7) connecting the components to electrical connection contacts (8). There is a sealing between the substrate plate and the carrier chip. The cross section of one projecting end (10) tapers from the substrate plate's surface (9) towards the point on this projecting end that juts out furthest.
申请公布号 EP1199751(A3) 申请公布日期 2005.12.07
申请号 EP20010126917 申请日期 1999.06.23
申请人 MICRONAS GMBH 发明人 IGEL, GUENTER, DIPL.-ING.;LEHMANN, MIRKO, DIPL.-PHYS.;SIEBEN, ULRICH, DR.;GAHLE, HANS-JUERGEN, DR.;BAUMANN, WERNER, DR.;EHRET, RALF, DR.
分类号 A61B5/00;A61B5/103;A61B5/15;A61M37/00;G01N21/01;G01N27/28;G01N27/403;G01N27/414;G01N33/487;H01L23/538;H01L25/07;(IPC1-7):H01L25/065 主分类号 A61B5/00
代理机构 代理人
主权项
地址