发明名称 UNIVERSAL SERIAL BUS CURRENT LIMIT
摘要 A load device includes an interface to a universal serial bus, a system bus coupled to the universal serial bus interface for powering electronic circuitry of the load device, a peripheral bus coupled to the universal serial bus interface, and an active switch coupled to the universal serial bus interface and the peripheral bus for applying power to the peripheral bus. The peripheral bus includes an internal capacitance, and the active switch has a switch input for controlling an operational interval of the active switch. The load device also includes a switch controller coupled to the active switch. The switch controller is configured to regulate the in-rush current drawn by the intern al capacitance by applying a pulse train to the switch input. The pulse train is predetermined to maintain the instantaneous voltage at the system bus above a predetermined lower limit.
申请公布号 CA2509026(A1) 申请公布日期 2005.12.02
申请号 CA20052509026 申请日期 2005.06.02
申请人 RESEARCH IN MOTION LIMITED 发明人 MAK-FAN, DAVID JAMES;DRADER, MARC A.;VESELIC, DUSAN
分类号 G06F1/26;(IPC1-7):G06F1/26 主分类号 G06F1/26
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