Compact decode and multiplexing circuitry for a multi-port memory having a common memory interface

摘要

A memory array for a multi-port memory having a common memory interface and a plurality of memory ports through which the memory array is accessed is provided. The memory array includes (r.s.t) memory locations with the memory array organized as a first memory sub-array accessible through a first of the plurality of memory ports as a (mxt) memory array and organized as a second memory sub-array accessible through a second of the plurality of memory ports as a (nxt) memory array. Both m and n are multiples of a value r, and the sum of (m/r) and (n/r) is equal to s. The memory array further organized as a common memory array accessible through the common memory interface as a (rxsxt) memory array.