发明名称 METHOD FOR MANUFACTURING MULTILAYER SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To increase the pattern precision of a wiring pattern formed on a multilayer substrate. SOLUTION: A via hole 114 is formed in a core substrate 111 whose surface is provided with conductive layers 112 and 113, and then a base conductive layer 121 is formed on almost the overall face, and an area where conductive materials 140 should not be formed is masked by dry films 131 and 132. In this status, the conductive materials 140 is grown by an electroplating method so that at least a portion of the inside part of the via hole 114 can be filled with the conductive materials 140. Then, the conductive materials 140 are ground in parallel with the surface of the core substrate 111, and the patterning of the conductive layers 112 and 113 is carried out. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005327885(A) 申请公布日期 2005.11.24
申请号 JP20040144260 申请日期 2004.05.14
申请人 TDK CORP 发明人 SATO JUN;ABE TOSHIYUKI;KATSUMATA MASASHI
分类号 H05K3/42;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/42
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