发明名称 LOOP PARALLELIZATION METHOD AND COMPILE SYSTEM
摘要 PROBLEM TO BE SOLVED: To obtain a loop parallelization method which parallelizes a loop in which data dependence over loop repetition exists which is conventionally difficult. SOLUTION: A pipeline parallelization conversion part 15 generates loops for issuing barrier synchronization before and after multiplex loops to the multiplex loops in which the data dependence over the loop repetition exists, and also generates a sentence for issuing the barrier synchronization immediately after the divided loops. Thus, the multiplex loop is executed in parallel like a pipeline in a multi-processor. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005327320(A) 申请公布日期 2005.11.24
申请号 JP20050233345 申请日期 2005.08.11
申请人 HITACHI LTD 发明人 ITO SHINICHI
分类号 G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/45
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