CIRCUIT FOR FAST AND ACCURATE MEMORY READ OPERATIONS

摘要

A memory circuit for sensing current in a target cell during a read operation is disclosed. According to one exemplary embodiment, the memory circuit comprises the target cell (305), a first neighboring cell (355), and an operational amplifier (381). The first target cell has a first bit line (316) connected to ground; the target cell also has a second bit line (321) connected to a drain voltage. A sensing circuit (360) is coupled at a first node (320) to at least one of the first bit line (316) or the second bit line (321). The first neighboring cell (355) has a third bit line (341) connected to a second node (350). The operational amplifier (381) has an output terminal connected at the second node (350) to the third bit line (341). The operational amplifier (381) has a noninverting input terminal connected to said first node (320), and also has an inverting input terminal connected to the second node (350).