| 摘要 |
Provided is a method of manufacturing a semiconductor device. In the method, an insulation spacer is formed thicker than a target thickness on sidewalls of a gate line formed on a semiconductor substrate. The thickness of the insulation spacer is adjusted by means of a wet etching process, so that aspect ratios of spaces between gate lines become smaller to control opening widths of junction areas. The method enhances fill-up characteristics of insulation layers between the gate lines, and improves the reliability of process and an electrical characteristic of device by controlling the opening widths of junction areas.
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