发明名称 Memory hub and method for memory sequencing
摘要 A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics-for example, page hit rate, prefetch hits, and/or cache hit rate. The performance counter communicates with a memory sequencer that adjusts its operation based on the system metrics tracked by the performance counter.
申请公布号 US2005257005(A1) 申请公布日期 2005.11.17
申请号 US20040846988 申请日期 2004.05.14
申请人 JEDDELOH JOSEPH M 发明人 JEDDELOH JOSEPH M.
分类号 G06F12/00;G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/00
代理机构 代理人
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