| 摘要 |
PROBLEM TO BE SOLVED: To appropriately establish the range of an isolation region between adjoining transistors. SOLUTION: In designing a layout of transistors, distances from gate electrodes of the transistors to ends of diffusion layers, Lfig1, Lfig2 and Lfig3 are displayed by lines in a multiple manner while adjusting to a variation amount of characteristics of the transistors, using a CAD tool. Moreover, a layer specifying the isolation region between the transistors is automatically elongated by the CAD tool. With such constitution, the layout of the isolation region is properly designed by a designer without visually measuring the distances, even if the characteristics of the transistors change according to the distances from the gate electrodes of the transistors to the ends of the diffusion layers. COPYRIGHT: (C)2006,JPO&NCIPI
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