发明名称 System and method for block error correction in packet-based digital communications
摘要 A system and method for efficiently correcting block errors in packet-based digital communications are provided whereby the ratio of redundant symbols/message symbols over the length of a data packet decreases in order to more efficiently use available bandwidth. The reduction of this ratio, and subsequently the change in a corresponding framing schedule, may be determined through negotiations between the transmitting device and the receiving devices. Each receiving device calculates a redundancy requirement based on signal-to-noise ratio samples. This requirement is returned to the transmitting device in the form of a schedule request. The transmitting device determines if a new framing schedule is needed based on the schedule request, and communicates this new framing schedule to the receiving device. Once the receiving device acknowledges receipt of the new schedule, the transmitting device switches to the new framing schedule for future data packet transmissions.
申请公布号 US6965636(B1) 申请公布日期 2005.11.15
申请号 US20000704236 申请日期 2000.10.30
申请人 2WIRE, INC. 发明人 DESJARDINS PHILIP;NORRELL ANDREW L.
分类号 H04B1/38;H04L1/00;H04L1/16;H04L5/16;(IPC1-7):H04B1/38 主分类号 H04B1/38
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