发明名称 RECEIVING SYSTEM AND SYMBOL DEMODULATING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a symbol delay synchronization demodulating circuit for generating symbol data from a quadrature detection signal, using as a symbol demodulation clock signal a clock signal in which a phase does not match a symbol point interval in the quadrature detection signal although a frequency matches a symbol speed. <P>SOLUTION: A delay circuit 36 delays and outputs an inputted quadrature detection signal. A sample and hold circuit 38 samples the quadrature detection signal at a predetermined frequency, and an amplitude calculating circuit 40 and a dispersion calculating circuit 42 calculate the dispersion of the sampled quadrature detection signal. A delay control circuit 44 controls the delay quantity of the delay circuit 36 so that the dispersion becomes the smallest. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005311801(A) 申请公布日期 2005.11.04
申请号 JP20040127552 申请日期 2004.04.23
申请人 JAPAN RADIO CO LTD 发明人 HIRAYAMA HIROHISA;TAKEUCHI YOSHIHIKO;HANEDA TORU;FUKINO KOJI;MIYAZAWA YOSHIO
分类号 H04L27/22 主分类号 H04L27/22
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