发明名称 |
METHOD AND STRUCTURE FOR CONNECTING GROUND/POWER NETWORKS TO PREVENT CHARGE DAMAGE IN SILICON ON INSULATOR |
摘要 |
A structure (and method) for an electronic chip, includes a first circuit design module having a first grid and a second circuit design module having a second grid. The first grid and the second grid are interconnected in a fabrication layer no later than a first metallization layer that accumulates a charge during a plasma process in the fabrication. |
申请公布号 |
US2005242439(A1) |
申请公布日期 |
2005.11.03 |
申请号 |
US20040709325 |
申请日期 |
2004.04.28 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DEVRIES KENNETH L.;GAMBINO JEFFREY P.;LUCE STEPHEN E.;WARNOCK JAMES D.;WHITE FRANCIS R. |
分类号 |
H01L23/48;H01L23/528;(IPC1-7):H01L23/48 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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