| 摘要 |
Disclosed is an electrolytic gold plating method of a PCB, which includes (A) forming an electrolytic copper-plated layer, corresponding to a predetermined copper plating resist pattern, on a substrate, (B) forming an electrolytic gold-plated layer, corresponding to a predetermined gold plating resist pattern, on the substrate using an outer layer of the substrate as a first incoming line for electrolytic gold plating use, and (C) removing a portion of the outer layer of the substrate, on which the electrolytic copper-plated layer is not coated.
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