发明名称 |
Control of execution of an algorithm by an integrated circuit |
摘要 |
<p>The process involves starting an execution of a calculation, and starting another execution of the same calculation once the former execution has freed a block and its process in a second. The executions are synchronized such that the latter execution uses a hardware block only when the former execution passes to the next block. The identity between the two results is verified at the end of execution of both the calculations. An independent claim is also included for a chip card.</p> |
申请公布号 |
EP1591866(A1) |
申请公布日期 |
2005.11.02 |
申请号 |
EP20050103280 |
申请日期 |
2005.04.22 |
申请人 |
ST MICROELECTRONICS S.A. |
发明人 |
LLARDET, PIERRE-YVAN;TEGLIA, YANNICK |
分类号 |
G06F21/72;G06F21/75;G06F21/77;(IPC1-7):G06F1/00 |
主分类号 |
G06F21/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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