发明名称 Semiconductor memory device equipped with error correction circuit
摘要 The objective of the invention is to provide a type of semiconductor memory device equipped with an error correction circuit 200 characterized by the fact that it can perform correction of errors in stored data without increasing the circuit size and power consumption, and without decreasing operating speed. An error correction code EC corresponds to data stored in sub-memory 120 separate from main data stored in main memory 110. In read mode, the main data and error correction code are read from the main memory and sub-memory, respectively. On the basis of these data, the error correction code is generated for correcting errors in the read data. Error correction circuit 300 corrects errors in the main data. By storing the error correction code in a sub-memory different from the main memory and selecting the appropriate layout of the main memory and sub-memory, it is possible to increase the reading speed of the error correction code and to suppress time delays caused by error correction.
申请公布号 US2005229080(A1) 申请公布日期 2005.10.13
申请号 US20050130059 申请日期 2005.05.17
申请人 TAKAHASHI HIROSHI;TAKEGAMA AKIHIRO;HANDA OSAMU;KIMIZUKA HIROSHI 发明人 TAKAHASHI HIROSHI;TAKEGAMA AKIHIRO;HANDA OSAMU;KIMIZUKA HIROSHI
分类号 H03M13/19;G06F11/10;G11C29/00;G11C29/42;H03M13/00;(IPC1-7):H03M13/00 主分类号 H03M13/19
代理机构 代理人
主权项
地址