发明名称 Masterslice, semiconductor memory, and method for manufacturing semiconductor memory
摘要 A semiconductor memory includes first to sixth ridges, an insulating layers on the first to sixth ridges, a first gate line above the first to fourth ridges, and a second gate line above the third to sixth ridges, wherein the first and sixth ridges, the insulating layers, and the first and second gate lines implement first and second capacitors, the second and third ridges and the first gate line implement first driver and load transistors, and the fourth and fifth ridges and the second gate lines implement second load and driver transistors.
申请公布号 EP1585177(A2) 申请公布日期 2005.10.12
申请号 EP20050252216 申请日期 2005.04.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MATSUZAWA, KAZUYA
分类号 G11C11/41;H01L27/11;G11C7/00;H01L21/8244;H01L21/84;H01L27/118;H01L27/12;(IPC1-7):H01L27/118 主分类号 G11C11/41
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