发明名称 TWO-STAGE ETCHING PROCESS FOR PRODUCING AN INTEGRATED CIRCUIT ARRANGEMENT, IN PARTICULAR COMPRISING A CAPACITOR ASSEMBLY
摘要 A method for production of an integrated circuit arrangement which contains a capacitor. A dielectric layer is structured with the aid of a two-stage etching process, and with the aid of a hard mask. In the case of an electrically insulating hard mask, the hard mask is removed again. In the case of an electrically conductive hard mask, parts of the hard mask may remain in the circuit arrangement.
申请公布号 EP1584103(A2) 申请公布日期 2005.10.12
申请号 EP20030815077 申请日期 2003.12.31
申请人 INFINEON TECHNOLOGIES AG 发明人 BARTH, HANS-JOACHIM;HOLZ, JUERGEN
分类号 H01L21/02;H01L21/308;H01L21/768;H01L23/00;H01L23/522;H01L23/532 主分类号 H01L21/02
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