发明名称 Phase-locked loop lock detector circuit and method of lock detection
摘要 There is provided a phase-locked loop lock detector circuit for detecting a lock or unlock state of a PLL circuit. A synchronization circuit synchronizes a lock window signal with a reference frequency signal. A rising edge detection circuit and a falling edge detection circuit output a state of an error signal at a rising edge of an output signal of the synchronization circuit and at a rising edge of an inverted lock window signal, respectively. A logic circuit performs an AND operation on outputs of the detection circuits, and outputs a signal indicating the lock or unlock state.
申请公布号 US6954510(B2) 申请公布日期 2005.10.11
申请号 US20010847790 申请日期 2001.05.02
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE JAE-WOOK
分类号 H03L7/08;H03L7/095;(IPC1-7):H03D3/24;H04L7/00 主分类号 H03L7/08
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