发明名称 A FULLY PARALLEL MULTI-CHANNEL DEMODULATOR
摘要 An improved multi-channel demodulator (44) is provided. The improved demodulator includes an automatic gain control (28), a data buffer (26, 30) and a demodulation engine (44). Data from various RF channels are processed by AGC in order to keep the data at their respective constant levels. Output from AGC (28) is passed to the data buffer for storage (30). Corresponding data from a selected channel is then processed by the demodulation engine (44). The improved demodulator is able to operate in any one of three operating modes, namely, a data processing mode, a channel switching mode and a waiting mode. In the data processing modes, the demodulation engine processes the channel data that is currently loaded into the demodulation engine. In the channel-switching mode, the demodulation engine stores the current channel data into the data buffer and retrieves and loads channel data from another channel for processing. In addition, status and history information relating to the current channel data is stored into a channel status memory (42) and status and history information relating to the next channel be processed is retrieved from the channel status memory (42). In one exemplary aspect, in order to reduce the channel switching time, status and history information relating to the next channel to be processed is preloaded during the previous data processing mode. In the waiting mode, the demodulation engine awaits further processing instructions to decide whether to enter into either the data processing mode or the channel-switching mode.
申请公布号 KR20050096928(A) 申请公布日期 2005.10.06
申请号 KR20057012377 申请日期 2002.12.30
申请人 BROADLOGIC NETWORK TECHNOLOGIES, INC. 发明人 ZHANG WEI MIN;RADIONOV VLADIMIR;STENERSON ROGER;LIU BIN FAN;KOU YU
分类号 H04L5/06;H04L27/06;H04L27/14;H04L27/22;H04L27/32;(IPC1-7):H04L27/14 主分类号 H04L5/06
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