发明名称 ESD protection circuit for high-voltage, high DV/DT pads
摘要 A pad that experiences a high-voltage, high dV/dT signal during normal operation is prevented from falsely triggering by utilizing a bipolar transistor connected to the pad to provide ESD protection, and a MOS transistor connected to the bipolar transistor to turn off the bipolar transistor during normal circuit operation.
申请公布号 US6952333(B1) 申请公布日期 2005.10.04
申请号 US20030662607 申请日期 2003.09.15
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 FARRENKOPF DOUGLAS ROBERT
分类号 H02H9/00;H02H9/04;(IPC1-7):H02H9/00 主分类号 H02H9/00
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