发明名称 High performance transmission link and interconnect
摘要 Methods and components in an interconnect system for improving the performance of the system with respect to increasing bandwidth in a serial link, increasing the processing speed of a packet in a node, and improving the calibration of links in the system are described. In one aspect of the present invention, a method of encoding framing data in a packet such that less than the normal number of framing bits is required. For example, a flit, the data unit sent over a serial link in one clock cycle, can be 88 bits in length, and a packet can be made up of one, two, or four flits. If the packet is a one- flit packet, two framing bits are inserted into the packet. If the packet is two flits, four framing bits are inserted into the packet, and if it is a four-flit packet, eight framing bits are inserted. In this way, space in the packet for data is maximized and the total number of bits of the packet can be determined either after reading a first framing bit if the packet is one flit or after reading a second framing bit if the packet is two or four flits long.
申请公布号 US6952419(B1) 申请公布日期 2005.10.04
申请号 US20000697730 申请日期 2000.10.25
申请人 SUN MICROSYSTEMS, INC. 发明人 CASSIDAY DANIEL R.;SATTERFIELD DAVID L.
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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