发明名称 |
ENHANCED CHIP SCALE PACKAGE FOR WIRE BONDS DIES |
摘要 |
A chip scale package assembly comprises an integrated circuit die wire bonded to a carrier for mounting to a printed circuit board. The carrier comprises top and bottom ground planes thermally and electrically bonded together by a number of grounded thermal vias. The top ground plane completely surrounds the wire bond signal connections made with the die, enhancing signal integrity. The top ground plane covers the die mounting area, providing grounding and heat spreading for the die. The thermal vias are also positioned in the mounting area, and thermally couple the die to the bottom-side ground plane. The bottom ground plane is positioned within a central area around which the signal connections from the top-side are arranged. Ground pads with attached solder balls are positioned within the bottom ground plane and conduct heat transferred from the die into a primary circuit board on which the carrier is mounted. |
申请公布号 |
SG114508(A1) |
申请公布日期 |
2005.09.28 |
申请号 |
SG20010006786 |
申请日期 |
2001.11.02 |
申请人 |
INSTITUTE OF MICROELECTRONICS;ADVANCED MICRO DEVICES (S) PTE LTD;AGILENT TECHNOLOGIES SINGAPORE PTE LTD;AMKOR TECHNOLOGIES INC;DELPHI AUTOMOTIVE SYSTEMS SINGAPORE PTE LTD;INFINEON TECHNOLOGIES (ASIA PACIFIC) PTE LTD;LUCENT TECHNOLOGIES MICROELECTRONICS PTE LTD;MOTOROLA ELECTRONICS PTE LTD;PHILIPS ELECTRONICS SINGAPORE PTE LTD;SINGAPORE TECHNOLOGIES ASSEMBLY TEST SERVICES LTD |
发明人 |
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分类号 |
H01L23/367;H01L23/498;H01L23/50 |
主分类号 |
H01L23/367 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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