发明名称 Method and apparatus for replacing a defective cell within a memory device having twisted bit lines
摘要 A method and apparatus is provided for replacing defective storage cells within a memory device having twisted bit lines. If a defective storage cell is discovered, the row containing that storage cell can be re-mapped to the neighboring row or the memory array. Each successive neighboring row is also re-mapped to succeeding neighboring rows by incrementing or decrementing the row addresses. This will cause the addresses to essentially shift one address value toward the redundant set of rows, and one redundant row will be subsumed for every defective row within the array. Whenever an address is shifted across a twist region, the data of that address is purposely inverted in binary voltage value (i.e., converted from a binary 1 to a binary 0, and vice versa) to accommodate the twisting of the true and complementary bit line locations.
申请公布号 US6950352(B1) 申请公布日期 2005.09.27
申请号 US20030716263 申请日期 2003.11.18
申请人 LSI LOGIC CORPORATION 发明人 JUNG CHANG HO;BROWN JEFF S.
分类号 G11C7/00;G11C7/18;G11C29/00;(IPC1-7):G11C7/00 主分类号 G11C7/00
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