Method and circuit for performing correlated double sub-sampling (CDSS) of pixels in an active pixel sensor (APS) array

摘要

A method and circuit for performing Correlated Double Sub-Sampling (CDSS) of pixels in an active pixel sensor (APS) array. Each pixel outputs a reset voltage and then an image signal voltage. The method and the apparatus subsamples a plurality (L² ) of pixels by: storing L² analog reset charges output from the L² pixels into a first set of (N²) storage capacitors, and combining the (L²) reset charges; storing L² analog image signal charges output from the L² pixels into a second set of (N²) storage capacitors, and combining the (L²) image charges; and then obtaining a differential voltage (VS-VR) by subtracting (in the analog-domain) the voltage (VR) represented by the combined (L²) reset charges from the voltage (VS) represented by the combined (L²) image signal charges. When L equals one, the circuit performs conventional Correlated Double Sampling CDS upon the one pixel. When L is greater than one, the circuit performs Correlated Double Sub-Sampling (CDSS) of the L² pixels. Dynamic selection of a subsampling ratio B (where B equals 1:L² and L ranges from 1 up to N) is supported. Averaging units used to combine the reset and image signal charges, and analog-to-digital converters (ADCs) for converting the differential voltage to a digital pixel data, may be commonly biased by the same variable bias voltage.