| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide such a technology by which charge-up measures can be taken without lowering a mounting rate, in a semiconductor device wherein a memory circuit and a logical circuit are provided in the same substrate. <P>SOLUTION: A gate array cell and a clamp diode Dn are formed in a logical section, and the n<SP>+</SP>semiconductor area 13nd of the clamp diode Dn and all or a part of a gate electrode 10B of a n-channel MISFET in the logical section are connected by using a conductive film BLD on the same layer as a bit line BL. By such a connection, a gate insulating film 8 can be prevented from being broken due to the charge-up of the n-channel MISFET in the logical section, and all channels on the upper layer formed in the following steps can be used for wiring in the cell or between the cells. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
